The present invention relates to a logic circuit testing apparatus and, more particularly, to method and apparatus for testing a logic circuit which can change test data in a testing apparatus.
A very large amount of test data is necessary to test a logic circuit. The test data includes a number of test patterns. Ordinarily, the test data is almost completely automatically formed by a computer. In the testing apparatus, many test patterns are sequentially supplied to a group of tester pins. Bits of the test patterns are assigned to the corresponding tester pins.
As an example of such a logic circuit testing apparatus, an apparatus for scan-testing a VLSI has been disclosed in "INTERNATIONAL TEST CONFERENCE 1985 PROCEEDINGS", pages 431 to 436.
FIG. 10 shows the VLSI testing apparatus disclosed in the above literature. A disk 202 on which test data formed by a general purpose computer was recorded, a CRT 203 to display an operating state or the like, and a line printer 204 to print out the results of the tests are connected to a host CPU 201 comprising a general purpose computer. On the other hand, n logic test stations (LTSs) 21l to 21n are connected to the host CPU 201 by means of a block multiplexer channel, thereby enabling a plurality of VLSIs to be simultaneously tested.
In the scan test, the logic circuits to be tested are divided into a plurality of subnetworks in order to make it easy to execute the tests. Each of the subnetworks comprises: a group of input side latches; a group of output side latches; and a combination logic block among those latch groups. Each combination logic block scans in input data for tests to the input side latch group and then scans out the output data from the output side latch group and compares with expected values, thereby individually executing the tests. A series of test patterns are prepared for each subnetwork. Each bit of each test pattern is assigned to a virtual pin number of the corresponding subnetwork. The test data is transferred from the host computer to a test pattern buffer in the testing apparatus. The test patterns are sequentially transferred from the test pattern buffer to a local storage. Addresses in the local storage correspond to the sequence in which the data stored in the local storage is applied to the tester pin group. The bit position in each address corresponds to the tester pin number assigned to the bit. When each test pattern is transferred from the test pattern buffer to the local storage, a converter converts the virtual pin number into the address and bit position (tester pin number) in the local storage.
It is often confirmed that at the test execution stage, the test data needs to be partially changed. For instance, this is because the test data itself is improper or the test data formed on the basis of only a logic structure becomes improper due to an influence by circuit characteristics. However, as well as the above scan testing apparatus, conventional testing apparatuses cannot change the test data. The change of test data must be executed by other proper apparatus, for instance, a host computer. During the changing operation of test data, the tests are interrupted. On the other hand, there is a case where a temporary change is merely needed and there is no need to change the original test data. However, in such a case, in addition to the original test data, a complete combination of the test data which was partially changed must be made.
It is easy to merely provide a mechanism in which the user can change the content of the test pattern buffer. However, it is not easy to know at which position in the test pattern buffer the test pattern bit to be changed exists. Particularly, in the case of the foregoing scan testing apparatus, there is used a format in which a virtual pin number different from the tester pin number is used and a control information portion which is common to a series of test patterns is omitted and compressed. That is, the test is executed on a subnetwork unit basis and only the changed portion of the test pattern is sent. Therefore, it is fairly difficult to change the test data in the buffer storage.